EP910PC-20T vs EP610PC-20T Comparison
Detailed side-by-side comparison of EP910PC-20T by Altera and EP610PC-20T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-20T | EP610PC-20T |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.70 | $7.20 |
| Device Type | EPLD | β |
| Family | Classic EPLD | Classic EPLD |
| Fabrication Technology | CMOS | β |
| Logic Integration | 300 to 900 usable gates | β |
| Logic Emulation | 100% TTL emulation | β |
| Application Function | High-speed, low-power logic integration | β |
| Programmable Device Class | Erasable programmable logic device | β |
| Device Family | Altera Classic EPLD Family | β |
| Speed Grade | 20 ns | β |
| Package Code | PC | β |
| Package Pin Count | [DATA_NEEDED: package pin count] | β |
| Package Dimensions | [DATA_NEEDED: package dimensions] | β |
| Supply Voltage | [DATA_NEEDED: operating supply voltage] | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| I/O Count | [DATA_NEEDED: I/O count] | β |
| Internal Logic Capacity | 300 to 900 usable gates | β |
| Supported Logic Integration | Multiple PAL- and GAL-type devices | β |
| Programming Interface | [DATA_NEEDED: programming interface] | β |
| Programming Voltage | [DATA_NEEDED: programming voltage] | β |
| Mounting Technology | [DATA_NEEDED: mounting technology] | β |
| RoHS Status | unknown | unknown |
| REACH Status | unknown | β |
| AEC-Q100 Qualification | not_applicable | β |
| Lead-Free Status | unknown | β |
| Halogen-Free Status | unknown | β |
| Logic Elements / Macrocells | β | 16 macrocells |
| Usable Gates | β | 300 gates |
| Propagation Delay (tPD) | β | 20 ns |
| Maximum Frequency (fMAX) | β | 62.5 MHz |
| Pipelined Data Rate | β | up to 100 MHz |
| Supply Voltage (VCC) | β | 5 V |
| Number of Dedicated Inputs | β | 16 |
| Number of I/O Pins | β | 16 |
| Programmable Output Enable | β | Yes (per macrocell) |
| Package | β | 24-pin PDIP (Plastic DIP) |
| Mounting Type | β | Through-Hole |
| Programming Technology | β | UV-erasable EPROM, CMOS |
| Development Tool | β | MAX+PLUS II |