EP910PC-20T vs EP610PC-20T तुलना
विस्तृत दोनों ओर की तुलना EP910PC-20T द्वारा Altera और EP610PC-20T द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP910PC-20T | EP610PC-20T |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Unknown | NRND |
| Device Type | EPLD | — |
| Family | Classic EPLD | Classic EPLD |
| Fabrication Technology | CMOS | — |
| Logic Integration | 300 to 900 usable gates | — |
| Logic Emulation | 100% TTL emulation | — |
| Application Function | High-speed, low-power logic integration | — |
| Programmable Device Class | Erasable programmable logic device | — |
| Device Family | Altera Classic EPLD Family | — |
| Speed Grade | 20 ns | — |
| Package Code | PC | — |
| Package Pin Count | [DATA_NEEDED: package pin count] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| सप्लाई वोल्टेज | [DATA_NEEDED: operating supply voltage] | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| I/O Count | [DATA_NEEDED: I/O count] | — |
| Internal Logic Capacity | 300 to 900 usable gates | — |
| Supported Logic Integration | Multiple PAL- and GAL-type devices | — |
| Programming Interface | [DATA_NEEDED: programming interface] | — |
| Programming Voltage | [DATA_NEEDED: programming voltage] | — |
| Mounting Technology | [DATA_NEEDED: mounting technology] | — |
| RoHS स्थिति | unknown | unknown |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | not_applicable | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Logic Elements / Macrocells | — | 16 macrocells |
| Usable Gates | — | 300 gates |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Number of Dedicated Inputs | — | 16 |
| Number of I/O Pins | — | 16 |
| Programmable Output Enable | — | Yes (per macrocell) |
| पैकेज | — | 24-pin PDIP (Plastic DIP) |
| माउंटिंग प्रकार | — | Through-Hole |
| Programming Technology | — | UV-erasable EPROM, CMOS |
| Development Tool | — | MAX+PLUS II |