EP910PC-20T vs EP910PC-20 Comparison

Detailed side-by-side comparison of EP910PC-20T by Altera and EP910PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910PC-20T EP910PC-20
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Unknown Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.70 $12.40
Device Type EPLD β€”
Family Classic EPLD Altera Classic EPLD
Fabrication Technology CMOS β€”
Logic Integration 300 to 900 usable gates β€”
Logic Emulation 100% TTL emulation β€”
Application Function High-speed, low-power logic integration β€”
Programmable Device Class Erasable programmable logic device β€”
Device Family Altera Classic EPLD Family β€”
Speed Grade 20 ns β€”
Package Code PC β€”
Package Pin Count [DATA_NEEDED: package pin count] β€”
Package Dimensions [DATA_NEEDED: package dimensions] β€”
Supply Voltage [DATA_NEEDED: operating supply voltage] β€”
Operating Temperature [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
I/O Count [DATA_NEEDED: I/O count] β€”
Internal Logic Capacity 300 to 900 usable gates β€”
Supported Logic Integration Multiple PAL- and GAL-type devices β€”
Programming Interface [DATA_NEEDED: programming interface] β€”
Programming Voltage [DATA_NEEDED: programming voltage] β€”
Mounting Technology [DATA_NEEDED: mounting technology] β€”
RoHS Status unknown [DATA_NEEDED: RoHS status]
REACH Status unknown β€”
AEC-Q100 Qualification not_applicable β€”
Lead-Free Status unknown β€”
Halogen-Free Status unknown β€”
Device β€” EP910
Usable Gates β€” 900
Macrocell Count β€” [DATA_NEEDED: macrocell count]
Pin-to-Pin Delay (tPD) β€” 20 ns
Package β€” PDIP-24 (PC suffix)
Pin Count β€” 24
Supply Voltage (VCC) β€” 5 V
Technology β€” CMOS EPROM (UV-erasable)
I/O Compatibility β€” 100% TTL
Programming Method β€” EPROM programmer, JEDEC fuse map
Mounting Type β€” Through-Hole (DIP)
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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