EP910PC30T vs EP910PC-20T Comparison
Detailed side-by-side comparison of EP910PC30T by Altera and EP910PC-20T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC30T | EP910PC-20T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Unknown |
| Family | Altera Classic EPLD | Classic EPLD |
| Device Series | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of I/O Pins | 24 | — |
| Number of Dedicated Inputs | 12 | — |
| Maximum Product Terms | 240 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Clock Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Process Technology | CMOS | — |
| Programmable Logic Architecture | PAL-type sum-of-products, EPLD | — |
| Package | 24-pin PDIP (PC) | — |
| Mounting Type | Through-Hole (THT) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -30 (30 ns tPD) | 20 ns |
| Programming Technology | EPROM (OTP in plastic package, UV-erasable in windowed package) | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Pin Count | 24 | — |
| Device Type | — | EPLD |
| Fabrication Technology | — | CMOS |
| Logic Integration | — | 300 to 900 usable gates |
| Logic Emulation | — | 100% TTL emulation |
| Application Function | — | High-speed, low-power logic integration |
| Programmable Device Class | — | Erasable programmable logic device |
| Device Family | — | Altera Classic EPLD Family |
| Package Code | — | PC |
| Package Pin Count | — | [DATA_NEEDED: package pin count] |
| Package Dimensions | — | [DATA_NEEDED: package dimensions] |
| Supply Voltage | — | [DATA_NEEDED: operating supply voltage] |
| I/O Count | — | [DATA_NEEDED: I/O count] |
| Internal Logic Capacity | — | 300 to 900 usable gates |
| Supported Logic Integration | — | Multiple PAL- and GAL-type devices |
| Programming Interface | — | [DATA_NEEDED: programming interface] |
| Programming Voltage | — | [DATA_NEEDED: programming voltage] |
| Mounting Technology | — | [DATA_NEEDED: mounting technology] |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | not_applicable |
| Lead-Free Status | — | unknown |
| Halogen-Free Status | — | unknown |