EP910PC30T vs EP910PC-20T 对比

详细并排对比 EP910PC30T 出自 Altera 和 EP910PC-20T 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910PC30T EP910PC-20T
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Unknown
库存状态 有库存 有库存
单价(USD) $8.85 $8.70
Family Altera Classic EPLD Classic EPLD
Device Series EP910 —
Number of Macrocells 24 —
Number of I/O Pins 24 —
Number of Dedicated Inputs 12 —
Maximum Product Terms 240 —
Propagation Delay (tPD) 30 ns —
Maximum Clock Frequency (fMAX) 33.3 MHz —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Process Technology CMOS —
Programmable Logic Architecture PAL-type sum-of-products, EPLD —
封装 24-pin PDIP (PC) —
安装类型 Through-Hole (THT) —
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Speed Grade -30 (30 ns tPD) 20 ns
Programming Technology EPROM (OTP in plastic package, UV-erasable in windowed package) —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] unknown
引脚数量 24 —
Device Type — EPLD
Fabrication Technology — CMOS
Logic Integration — 300 to 900 usable gates
Logic Emulation — 100% TTL emulation
Application Function — High-speed, low-power logic integration
Programmable Device Class — Erasable programmable logic device
Device Family — Altera Classic EPLD Family
Package Code — PC
Package Pin Count — [DATA_NEEDED: package pin count]
Package Dimensions — [DATA_NEEDED: package dimensions]
电源电压 — [DATA_NEEDED: operating supply voltage]
I/O Count — [DATA_NEEDED: I/O count]
Internal Logic Capacity — 300 to 900 usable gates
Supported Logic Integration — Multiple PAL- and GAL-type devices
Programming Interface — [DATA_NEEDED: programming interface]
Programming Voltage — [DATA_NEEDED: programming voltage]
Mounting Technology — [DATA_NEEDED: mounting technology]
REACH Status — unknown
AEC-Q100 Qualification — not_applicable
Lead-Free Status — unknown
Halogen-Free Status — unknown

数据手册与资源

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