EP910PI-30T vs EP910PI-12T Comparison
Detailed side-by-side comparison of EP910PI-30T by Altera and EP910PI-12T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-30T | EP910PI-12T |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $9.95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 480 | β |
| Dedicated Inputs | 10 | 12 |
| Propagation Delay (tPD) | 30 ns | 12 ns |
| Register (Clock-to-Output) Delay | 20 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (4.75 V min, 5.25 V max) |
| Technology | CMOS, UV-erasable (windowed ceramic) | β |
| Package Type | 40-pin PDIP (ceramic windowed) | β |
| Mounting Type | Through-Hole | β |
| Operating Temperature | -40 C to +85 C (industrial) | 0C to +70C (commercial) |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (legacy PDIP package, contains lead) |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Maximum Operating Frequency | β | 76.9 MHz |
| Logic Gates | β | [DATA_NEEDED: logic gate count] |
| I/O Pins | β | 24 |
| External Clock Inputs | β | 2 |
| Outputs | β | 24 |
| Terminals / Pin Count | β | 44 (PDIP-40 package pinout with NC pins) |
| Package | β | 40-pin PDIP (Plastic DIP) |
| Process Technology | β | CMOS |
| Programmable Technology | β | UV-erasable EPROM |
| Programming Interface | β | JEDEC-standard |
| Lifecycle Status | β | NRND / EOL (mature legacy product) |