EP910PI-30T vs EP910PI-20 Comparison
Detailed side-by-side comparison of EP910PI-30T by Altera and EP910PI-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-30T | EP910PI-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $9.75 |
| Product Type | EPLD (Erasable Programmable Logic Device) | β |
| Family | Altera Classic EPLD | β |
| Macrocells | 24 | 24 |
| Usable Gates | 480 | β |
| Dedicated Inputs | 10 | 12 |
| Propagation Delay (tPD) | 30 ns | 20 ns |
| Register (Clock-to-Output) Delay | 20 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (+/- 5%) |
| Technology | CMOS, UV-erasable (windowed ceramic) | CMOS EPROM (UV-erasable windowed variants available) |
| Package Type | 40-pin PDIP (ceramic windowed) | β |
| Mounting Type | Through-Hole | Through-Hole |
| Operating Temperature | -40 C to +85 C (industrial) | -40C to +85C (industrial) |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Device Family | β | Altera Classic EPLD Family |
| Package | β | PDIP-40 (PI suffix) |
| Configuration Method | β | Non-volatile EPROM (no boot PROM required) |
| Bidirectional I/O Pins | β | 24 |
| Maximum Counter Frequency | β | 125 MHz |
| Output Drive Current (IOL) | β | 24 mA (TTL-compatible) |
| Programmable Polarity | β | Yes (XOR gate per macrocell) |
| Macrocell Flip-Flop | β | Yes (D-type, programmable) |
| Power Dissipation | β | [DATA_NEEDED: typical power dissipation in mW] |
| Programming Interface | β | JEDEC file via Altera programming hardware |
| MIL-STD-883 Variant | β | EP910DM/883B (separate part number) |