EP910PI-30T vs EP910PI-20 Vergleich
Detaillierter Direktvergleich von EP910PI-30T von Altera und EP910PI-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PI-30T | EP910PI-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,95 | $9,75 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EPLD | — |
| Macrocells | 24 | 24 |
| Usable Gates | 480 | — |
| Dedicated Inputs | 10 | 12 |
| Propagation Delay (tPD) | 30 ns | 20 ns |
| Register (Clock-to-Output) Delay | 20 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (+/- 5%) |
| Technology | CMOS, UV-erasable (windowed ceramic) | CMOS EPROM (UV-erasable windowed variants available) |
| Package Type | 40-pin PDIP (ceramic windowed) | — |
| Montageart | Through-Hole | Through-Hole |
| Betriebstemperatur | -40 C to +85 C (industrial) | -40C to +85C (industrial) |
| Programming | Altera Classic device programmer / MAX+PLUS II flow | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | Altera Classic EPLD Family |
| Gehäuse | — | PDIP-40 (PI suffix) |
| Configuration Method | — | Non-volatile EPROM (no boot PROM required) |
| Bidirectional I/O Pins | — | 24 |
| Maximum Counter Frequency | — | 125 MHz |
| Output Drive Current (IOL) | — | 24 mA (TTL-compatible) |
| Programmable Polarity | — | Yes (XOR gate per macrocell) |
| Macrocell Flip-Flop | — | Yes (D-type, programmable) |
| Power Dissipation | — | [DATA_NEEDED: typical power dissipation in mW] |
| Programming Interface | — | JEDEC file via Altera programming hardware |
| MIL-STD-883 Variant | — | EP910DM/883B (separate part number) |