EPC16UC88 vs EPC16UC88T Comparison
Detailed side-by-side comparison of EPC16UC88 by Altera and EPC16UC88T by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC16UC88 | EPC16UC88T |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | EEPROM |
| Lifecycle Status | Unknown | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $9.95 |
| Device Type | In-system programmable configuration PROM for FPGAs | β |
| Configuration Memory Capacity | 16 Mb | β |
| Supply Voltage | 3.3 V core and I/O | β |
| Package | 88-UBGA (11x8) | 88-ball UBGA, 11 mm x 8 mm |
| Package Family | UBGA | β |
| In-System Programmability | IEEE Std. 1532 compatible | β |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | β |
| JTAG Boundary Scan | Supported | β |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | β |
| Configuration Architecture | Configuration controller and flash memory | β |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | β |
| Data Output | Configuration data output controlled by OE and nCS | β |
| Output Control | OE and nCS control tri-state buffer and address counter | β |
| Mounting Type | Surface mount | β |
| Package Dimensions | 11 mm x 8 mm | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS] |
| REACH Status | [DATA_NEEDED: REACH status] | β |
| Operating Temperature | [DATA_NEEDED: operating temperature] | β |
| Output Current | [DATA_NEEDED: output current] | β |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | β |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | β |
| Memory Type | β | Non-volatile Flash configuration PROM (in-system programmable) |
| Memory Density | β | 16 Mbit (2,097,152 x 8 bits) |
| Configuration Interface | β | Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF_DONE) |
| Maximum DCLK Frequency | β | 33 MHz |
| Supply Voltage (VCC) | β | 3.0 V to 3.6 V (3.3 V nominal) |
| Operating Temperature Range | β | -40 C to +85 C (industrial) |
| In-System Programming | β | IEEE Std 1149.1 (JTAG) |
| Cascade Support | β | Yes (for higher density multi-PROM chains) |
| MSEL Compatibility | β | FPP / PS configuration modes (3.3 V legacy) |
| Compatible FPGA Families | β | Cyclone, Cyclone II, Stratix, Stratix II, Stratix III, Stratix IV, Arria GX |
| Family Density Step | β | Largest member of EPC4 / EPC8 / EPC16 family |
| MSL Level | β | [DATA_NEEDED: MSL] |
| Lead-Free / Halogen-Free | β | [DATA_NEEDED: lead-free status] |
| Open-Drain nINIT_CONF_DONE | β | Yes |