EPC16UC88 vs EPC16UC88T Perbandingan
Perbandingan bersamaan detil EPC16UC88 dari Altera dan EPC16UC88T dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPC16UC88 | EPC16UC88T |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | Memory ICs | EEPROM |
| Status Lingkungan Hidup | Unknown | Waktu Pembelian Terakhir |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| Tegangan Pemuat | 3.3 V core and I/O | — |
| Paket | 88-UBGA (11x8) | 88-ball UBGA, 11 mm x 8 mm |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | — |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| Tipe Mounting | Surface mount | — |
| Package Dimensions | 11 mm x 8 mm | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Suhu Kerja | [DATA_NEEDED: operating temperature] | — |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Tipe Memori | — | Non-volatile Flash configuration PROM (in-system programmable) |
| Memory Density | — | 16 Mbit (2,097,152 x 8 bits) |
| Configuration Interface | — | Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF_DONE) |
| Maximum DCLK Frequency | — | 33 MHz |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| Rentang Suhu Kerja | — | -40 C to +85 C (industrial) |
| In-System Programming | — | IEEE Std 1149.1 (JTAG) |
| Cascade Support | — | Yes (for higher density multi-PROM chains) |
| MSEL Compatibility | — | FPP / PS configuration modes (3.3 V legacy) |
| Compatible FPGA Families | — | Cyclone, Cyclone II, Stratix, Stratix II, Stratix III, Stratix IV, Arria GX |
| Family Density Step | — | Largest member of EPC4 / EPC8 / EPC16 family |
| Level MSL | — | [DATA_NEEDED: MSL] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Open-Drain nINIT_CONF_DONE | — | Yes |