EPC2L120N vs EPC2L120 Comparison

Detailed side-by-side comparison of EPC2L120N by Intel and EPC2L120 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC2L120N EPC2L120
Brand Intel Altera
Category FPGA & CPLD Memory ICs
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $7.85 $5.20
Device Type Configuration Device for SRAM-based LUT FPGAs β€”
Manufacturer Intel (formerly Altera) β€”
Family EPC2 (Enhanced Configuration Device) EPC2 (Enhanced Configuration)
Memory Capacity 165,888 bits (400,000 gates equivalent) β€”
Operating Voltage (VCCIO) 2.7 V to 3.6 V β€”
5V Tolerance Yes (5V-tolerant I/O) β€”
Configuration Clock (FPP) Up to 66 MHz β€”
Configuration Clock (PS) Up to 33 MHz β€”
Internal Oscillator 8 MHz with programmable divider β€”
JTAG Interface IEEE Std 1149.1 compliant, ISP support β€”
Programming Cycles 100,000 erase/program cycles β€”
Sector Erase Time [DATA_NEEDED: typical sector erase time] β€”
Package 84-pin PLCC (J-Lead) PLCC-20
Configuration Schemes FPP, PS, JTAG, daisy chain β€”
Operating Temperature [DATA_NEEDED: industrial temp range] -40 C to +85 C
Supported FPGA Families Cyclone, APEX, FLEX, Mercury, ACEX, Stratix β€”
RoHS Status unknown unknown
Memory Type β€” Configuration PROM (Flash-based)
Density β€” 120 Kbit
Configuration Interface β€” Serial, FPGA-targeted
Operating Voltage β€” 2.7 V to 3.6 V (3.3 V typ)
In-System Programmability β€” Yes (IEEE 1149.1 JTAG)
Compatible FPGAs β€” Altera Cyclone, Cyclone II, APEX-series
CONF_DONE Output β€” Open-drain, wire-OR capable
Data Retention β€” 20 years (per Altera datasheet family)
Program/Erase Cycles β€” 100 cycles minimum
Mounting Type β€” Surface Mount
Lead-Free β€” unknown

Datasheets & Resources

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