EPC2LC20-U vs EPC2LI20N Comparison
Detailed side-by-side comparison of EPC2LC20-U by Altera and EPC2LI20N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPC2LC20-U | EPC2LI20N |
|---|---|---|
| Brand | Altera | Altera |
| Category | Memory ICs | Memory ICs |
| Lifecycle Status | Obsolete | Obsolete |
| Memory Type | Configuration PROM (Flash, in-system programmable) | Non-volatile configuration PROM (Flash) |
| Memory Size | 1.6 Mbit | 1.6 Mbit |
| Interface | Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1) | — |
| Max Configuration Clock | 10 MHz | — |
| Supply Voltage (VCC) | 3.3 V (3.0 V to 3.6 V) | — |
| Programmable | In-system via JTAG | — |
| Cascade Support | Yes (multi-PROM for larger bitstreams) | — |
| Package | 20-PLCC (9x9) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: full operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Package / Case | — | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | — | Tube |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |