EPC2LC20-U vs EPC2LI20N Perbandingan

Perbandingan bersamaan detil EPC2LC20-U dari Altera dan EPC2LI20N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2LC20-U EPC2LI20N
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete Obsolete
Tipe Memori Configuration PROM (Flash, in-system programmable) Non-volatile configuration PROM (Flash)
Ukuran Memori 1.6 Mbit 1.6 Mbit
Antarmuka Serial (4-wire Altera configuration) + JTAG (IEEE 1149.1) —
Max Configuration Clock 10 MHz —
Supply Voltage (VCC) 3.3 V (3.0 V to 3.6 V) —
Programmable In-system via JTAG —
Cascade Support Yes (multi-PROM for larger bitstreams) —
Paket 20-PLCC (9x9) —
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja [DATA_NEEDED: full operating temperature range] [DATA_NEEDED: operating temperature range]
Supported FPGA Families ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K —
JTAG Support Yes (IEEE 1149.1 boundary-scan) —
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
Level MSL [DATA_NEEDED: moisture sensitivity level] —
Programmable Type — In System Programmable (ISP via JTAG)
Configuration Mode — Serial
Maximum Configuration Frequency — 10 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
Supply Voltage (VCCIO) — 4.5 V to 5.5 V
Paket / Case — 20-PLCC (J-Lead), 9x9 mm
Packaging — Tube
Supported FPGA Series — ACEX 1K, APEX II, Cyclone, Stratix II
JTAG Interface — IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO)
Configuration Pins — nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE

Spek dan Sumber

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