EPF10K200SFI672-2 vs EPF10K200SFC672-2 Comparison
Detailed side-by-side comparison of EPF10K200SFI672-2 by Intel and EPF10K200SFC672-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPF10K200SFI672-2 | EPF10K200SFC672-2 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $99.50 | $320.00 |
| Family | FLEX 10KE | β |
| Logic Elements | 9984 | 9,984 |
| System Gates | 200000 | 200,000 |
| Logic Array Blocks (LABs) | 1248 | 1,248 |
| User I/Os | 470 | β |
| Embedded Array Blocks (EABs) | 24 | β |
| Embedded Memory (EAB SRAM) | 96 Kbit | β |
| Distributed Memory | 98304 bits | β |
| Process Technology | 0.22 Β΅m (Arrow lists 0.42 Β΅m) | 0.22 Β΅m CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V (2.375 V to 2.625 V) |
| Package | 672-pin FineLine BGA (FBGA) | 672-pin FineLine BGA (FBGA), 45 Γ 45 mm, 1.27 mm pitch |
| Speed Grade | -2 | -2 |
| Operating Temperature | Industrial (-40C to +85C) | 0 Β°C to +70 Β°C (Commercial) |
| JTAG Boundary Scan | IEEE Std. 1149.1-1990 compliant | β |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (3.3 V, 33/66 MHz) on -1 speed grade | β |
| Programming | SRAM-based, in-system programmable | β |
| RoHS Status | Not compliant (per Arrow EU RoHS listing) | [DATA_NEEDED: RoHS compliance status] |
| Series | β | FLEX 10KE |
| User I/O Pins | β | 470 |
| Embedded Memory (bits) | β | 98,304 |
| I/O Supply Voltage | β | MultiVolt 2.5 V / 3.3 V / 5.0 V |
| Internal Propagation Delay | β | 0.4 ns |
| Maximum Operating Frequency | β | 200 MHz |
| Configuration Method | β | SRAM-based, passive parallel asynchronous |
| Boundary Scan | β | IEEE 1149.1 (JTAG) |
| On-chip PLL | β | Yes |