EPF10K200SFI672-2 vs EPF10K200SFC672-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200SFI672-2 sa pamamagitan ng Intel at EPF10K200SFC672-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K200SFI672-2 | EPF10K200SFC672-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | FLEX 10KE | — |
| Logic Elements | 9984 | 9,984 |
| System Gates | 200000 | 200,000 |
| Logic Array Blocks (LABs) | 1248 | 1,248 |
| User I/Os | 470 | — |
| Embedded Array Blocks (EABs) | 24 | — |
| Embedded Memory (EAB SRAM) | 96 Kbit | — |
| Distributed Memory | 98304 bits | — |
| Process Technology | 0.22 µm (Arrow lists 0.42 µm) | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V (2.375 V to 2.625 V) |
| Packhaging | 672-pin FineLine BGA (FBGA) | 672-pin FineLine BGA (FBGA), 45 × 45 mm, 1.27 mm pitch |
| Speed Grade | -2 | -2 |
| Temperature na Operasyon | Industrial (-40C to +85C) | 0 °C to +70 °C (Commercial) |
| JTAG Boundary Scan | IEEE Std. 1149.1-1990 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (3.3 V, 33/66 MHz) on -1 speed grade | — |
| Programming | SRAM-based, in-system programmable | — |
| Tindminan RoHS | Not compliant (per Arrow EU RoHS listing) | [DATA_NEEDED: RoHS compliance status] |
| Series | — | FLEX 10KE |
| User I/O Pins | — | 470 |
| Embedded Memory (bits) | — | 98,304 |
| I/O Supply Voltage | — | MultiVolt 2.5 V / 3.3 V / 5.0 V |
| Internal Propagation Delay | — | 0.4 ns |
| Maximum Operating Frequency | — | 200 MHz |
| Configuration Method | — | SRAM-based, passive parallel asynchronous |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| On-chip PLL | — | Yes |