EPF8452ALC84-4 vs EPF8636ALC84-4 Comparison

Detailed side-by-side comparison of EPF8452ALC84-4 by Altera and EPF8636ALC84-4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPF8452ALC84-4 EPF8636ALC84-4
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family FLEX 8000 FLEX 8000
Process Technology 0.42 um CMOS 0.42 µm CMOS SRAM
Logic Elements (LEs) 336 —
Usable Gates Approximately 4,000 —
Logic Array Blocks (LABs) 42 —
User I/Os 68 —
Supply Voltage 5 V —
I/O Standards Supported 3.3 V / 5.0 V (MultiVolt I/O) —
Maximum Operating Frequency 125 MHz 125 MHz
Configuration Method Serial (EPC1, EPC1213, EPC1064, EPC1441) or parallel EPROM Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM
In-Circuit Reconfigurability Yes (ICR via SRAM) —
Package 84-pin PLCC (J-Lead, plastic) 84-Pin PLCC (J-Lead)
Operating Temperature 0 C to +70 C (commercial) 0 °C to +70 °C (Commercial)
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount / Socket
RoHS Status [DATA_NEEDED: RoHS status] Non-compliant (legacy PLCC, lead-bearing)
MSL Level [DATA_NEEDED: MSL level] —
Number of Logic Cells — 504
Number of Logic Array Blocks (LABs) — 63
Maximum Usable Gates — 6,000
Number of User I/O Pins — 68
Supply Voltage (Core) — 5.0 V
I/O Voltage (84-pin PLCC) — 5.0 V only (3.3 V I/O NOT supported on this package)
Operating Current (typical) — 10 mA
Speed Grade — -4
Configuration Memory Type — Volatile SRAM (requires boot device)
Boundary Scan — IEEE 1149.1 (JTAG)

Datasheets & Resources

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