EPM3064ATC100-7N vs EPM3064ATC-100-10N Comparison
Detailed side-by-side comparison of EPM3064ATC100-7N by Altera and EPM3064ATC-100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera
EPM3064ATC-100-10N β ActiveSpecification Comparison
| Parameter | EPM3064ATC100-7N | EPM3064ATC-100-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.10 | $2.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | β |
| Logic Array Blocks (LABs) | 2 | 2 |
| User I/O Pins | 66 | 66 |
| Usable Gates | up to 1,250 | β |
| Propagation Delay (tPD) | 7.5 ns (pin-to-pin, -7 speed grade) | β |
| Maximum Internal Frequency | 166.7 MHz (-7 speed grade) | β |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | β |
| Program Memory Technology | EEPROM (non-volatile) | β |
| In-System Programming | IEEE Std. 1149.1 (JTAG), IEEE Std. 1532 | β |
| Package | TQFP-100 | TQFP-100 |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | 0C to +70C (commercial) |
| RoHS Status | [DATA_NEEDED: confirmed RoHS status from manufacturer page] | Compliant |
| Macro Cells | β | 64 |
| Usable Gates (min) | β | 600 |
| Usable Gates (typical) | β | 1,250 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Counter Frequency (fCNT) | β | 227.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| In-System Programmability | β | Yes (IEEE 1532 / JTAG 1149.1) |
| Programming Interface | β | 4-pin JTAG (TCK/TMS/TDI/TDO) |