EPM3064ATC44-7 vs EPM3064ATI44-7 Comparison

Detailed side-by-side comparison of EPM3064ATC44-7 by Altera and EPM3064ATI44-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC44-7 EPM3064ATI44-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $4.20 $4.40
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 64 64
Logic Array Blocks 4 β€”
Usable Gates 1.25K 1,250
User I/O Pins 34 β€”
Pin Count 44 β€”
Package TQFP-44 44-pin TQFP (TI44)
Speed Grade -7 (7.5 ns tPD) β€”
Pin-to-Pin Propagation Delay 7.5 ns β€”
Maximum Counter Frequency 192.3 MHz β€”
Supply Voltage (Core) 3.3 V β€”
I/O Logic Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt) β€”
Programming Interface IEEE Std. 1149.1 JTAG (ISP) β€”
Process Technology CMOS EEPROM 0.30 Β΅m CMOS EEPROM
Operating Temperature 0C to +70C (Commercial) -40 Β°C to +85 Β°C (Industrial, 'I' suffix)
Mounting Type Surface Mount Surface Mount
RoHS Status unknown [DATA_NEEDED: RoHS status]
Product Type β€” CPLD (Complex Programmable Logic Device)
User I/O β€” 34
Logic Array Blocks (LABs) β€” 4 (16 macrocells each)
Propagation Delay (tPD) β€” 7.5 ns
Maximum Internal Frequency (fMAX) β€” 135.1 MHz
Supply Voltage (VCCINT) β€” 3.0 V to 3.6 V
Supply Voltage (VCCIO) β€” 3.0 V to 3.6 V
In-System Programmability β€” Yes, IEEE Std. 1532 compliant
JTAG Support β€” Yes (IEEE 1149.1)
PCI Compliance β€” Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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