EPM3064ATC44-7 vs EPM3064ATI44-7 对比

详细并排对比 EPM3064ATC44-7 出自 Altera 和 EPM3064ATI44-7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3064ATC44-7 EPM3064ATI44-7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $4.20 $4.40
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 64
Logic Array Blocks 4 —
Usable Gates 1.25K 1,250
User I/O Pins 34 —
引脚数量 44 —
封装 TQFP-44 44-pin TQFP (TI44)
Speed Grade -7 (7.5 ns tPD) —
Pin-to-Pin Propagation Delay 7.5 ns —
Maximum Counter Frequency 192.3 MHz —
Supply Voltage (Core) 3.3 V —
I/O Logic Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programming Interface IEEE Std. 1149.1 JTAG (ISP) —
Process Technology CMOS EEPROM 0.30 µm CMOS EEPROM
工作温度 0C to +70C (Commercial) -40 °C to +85 °C (Industrial, 'I' suffix)
安装类型 Surface Mount Surface Mount
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
Product Type — CPLD (Complex Programmable Logic Device)
User I/O — 34
Logic Array Blocks (LABs) — 4 (16 macrocells each)
Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fMAX) — 135.1 MHz
Supply Voltage (VCCINT) — 3.0 V to 3.6 V
Supply Voltage (VCCIO) — 3.0 V to 3.6 V
In-System Programmability — Yes, IEEE Std. 1532 compliant
JTAG Support — Yes (IEEE 1149.1)
PCI Compliance — Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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