EPM3064ATI44-10NAE vs EPM3064ATC44-10NAF Comparison
Detailed side-by-side comparison of EPM3064ATI44-10NAE by Intel and EPM3064ATC44-10NAF by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3064ATI44-10NAE - MAX 3000A CPLD, 64 Macro, 34 I/O, 10ns | Intel
EPM3064ATI44-10NAE β ActiveAltera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF NrndSpecification Comparison
| Parameter | EPM3064ATI44-10NAE | EPM3064ATC44-10NAF |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.05 | $5.05 |
| Family | MAX 3000A | β |
| Device Family | EPM3064A | β |
| Macrocells | 64 | β |
| Usable Gates | 1250 | 1250 |
| User I/O Pins | 34 | β |
| Logic Elements (LABs) | 4 | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Frequency (fMAX) | [DATA_NEEDED: maximum internal frequency MHz] | β |
| Supply Voltage VCCINT | 3.0 V to 3.6 V | β |
| I/O Supply Voltage VCCIO | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | β |
| Operating Temperature | -40 Β°C to +85 Β°C (industrial) | [DATA_NEEDED: industrial/commercial grade] |
| Package | 44-pin TQFP | TQFP-44 (10x10 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable Technology | CMOS EEPROM | EEPROM (non-volatile) |
| In-System Programmable | Yes (JTAG, IEEE 1149.1) | Yes (IEEE Std. 1532 compliant) |
| Lead-Free / RoHS | Yes (AE suffix) | β |
| Lifecycle Status | Active (MAX 3000A legacy family) | β |
| Series | β | MAX 3000A |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 64 |
| Logic Elements / LABs | β | 4 LABs (16 macrocells per LAB) |
| Number of I/O Pins | β | 34 |
| Propagation Delay (tPD, max) | β | 10 ns |
| Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| I/O Voltage Tolerance | β | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) |
| Boundary-Scan Test | β | Yes (IEEE Std. 1149.1 JTAG) |
| Pin-Locking | β | Yes |
| Lead Finish | β | Lead-free (NiPdAu, AF suffix) |
| RoHS Status | β | Compliant |
| Configuration Memory Cycles | β | 100 erase/program cycles |