EPM3064ATI44-10NAE vs EPM3064ATC44-10NAF Comparación
Comparación detallada lado a lado de EPM3064ATI44-10NAE por Intel y EPM3064ATC44-10NAF por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM3064ATI44-10NAE - MAX 3000A CPLD, 64 Macro, 34 I/O, 10ns | Intel
EPM3064ATI44-10NAE ✓ ActivoAltera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF NrndComparación de especificaciones
| Parámetro | EPM3064ATI44-10NAE | EPM3064ATC44-10NAF |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3,05 | $5,05 |
| Family | MAX 3000A | — |
| Device Family | EPM3064A | — |
| Macrocells | 64 | — |
| Usable Gates | 1250 | 1250 |
| User I/O Pins | 34 | — |
| Logic Elements (LABs) | 4 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: maximum internal frequency MHz] | — |
| Supply Voltage VCCINT | 3.0 V to 3.6 V | — |
| I/O Supply Voltage VCCIO | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Temperatura de funcionamiento | -40 °C to +85 °C (industrial) | [DATA_NEEDED: industrial/commercial grade] |
| Encapsulado | 44-pin TQFP | TQFP-44 (10x10 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programmable Technology | CMOS EEPROM | EEPROM (non-volatile) |
| In-System Programmable | Yes (JTAG, IEEE 1149.1) | Yes (IEEE Std. 1532 compliant) |
| Lead-Free / RoHS | Yes (AE suffix) | — |
| Estado del ciclo de vida | Active (MAX 3000A legacy family) | — |
| Series | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 64 |
| Logic Elements / LABs | — | 4 LABs (16 macrocells per LAB) |
| Number of I/O Pins | — | 34 |
| Propagation Delay (tPD, max) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Voltage Tolerance | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) |
| Boundary-Scan Test | — | Yes (IEEE Std. 1149.1 JTAG) |
| Pin-Locking | — | Yes |
| Lead Finish | — | Lead-free (NiPdAu, AF suffix) |
| Estado RoHS | — | Compliant |
| Configuration Memory Cycles | — | 100 erase/program cycles |