EPM3064ATI44-10NAE vs EPM3064ATC44-10NAF Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-10NAE sa pamamagitan ng Intel at EPM3064ATC44-10NAF sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM3064ATI44-10NAE - MAX 3000A CPLD, 64 Macro, 34 I/O, 10ns | Intel
EPM3064ATI44-10NAE ✓ NakahandaAltera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF NrndPagsanggunian na paghahambing
| Parametro | EPM3064ATI44-10NAE | EPM3064ATC44-10NAF |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | MAX 3000A | — |
| Device Family | EPM3064A | — |
| Macrocells | 64 | — |
| Usable Gates | 1250 | 1250 |
| User I/O Pins | 34 | — |
| Logic Elements (LABs) | 4 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: maximum internal frequency MHz] | — |
| Supply Voltage VCCINT | 3.0 V to 3.6 V | — |
| I/O Supply Voltage VCCIO | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Temperature na Operasyon | -40 °C to +85 °C (industrial) | [DATA_NEEDED: industrial/commercial grade] |
| Packhaging | 44-pin TQFP | TQFP-44 (10x10 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmable Technology | CMOS EEPROM | EEPROM (non-volatile) |
| In-System Programmable | Yes (JTAG, IEEE 1149.1) | Yes (IEEE Std. 1532 compliant) |
| Lead-Free / RoHS | Yes (AE suffix) | — |
| Katayuan ng Lifecycle | Active (MAX 3000A legacy family) | — |
| Series | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 64 |
| Logic Elements / LABs | — | 4 LABs (16 macrocells per LAB) |
| Number of I/O Pins | — | 34 |
| Propagation Delay (tPD, max) | — | 10 ns |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Voltage Tolerance | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) |
| Boundary-Scan Test | — | Yes (IEEE Std. 1149.1 JTAG) |
| Pin-Locking | — | Yes |
| Lead Finish | — | Lead-free (NiPdAu, AF suffix) |
| Tindminan RoHS | — | Compliant |
| Configuration Memory Cycles | — | 100 erase/program cycles |