EPM3128ATC100-10 vs EPM3128ATC144-10 Comparison
Detailed side-by-side comparison of EPM3128ATC100-10 by Altera and EPM3128ATC144-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATC100-10 - MAX 3000A 128-Macrocell CPLD, 10ns TQFP-100 | Intel / Altera
EPM3128ATC100-10 Nrnd
Specification Comparison
| Parameter | EPM3128ATC100-10 | EPM3128ATC144-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.10 | $6.20 |
| Device Family | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | β |
| User I/Os | 80 | 96 |
| Usable Gates | 2500 | 2,500 (typical) |
| Propagation Delay (tPD) | 10 ns | 10 ns (speed grade -10) |
| Counter Frequency | 227.3 MHz | β |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Voltage Tolerance | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | β |
| Package | 100-pin TQFP | 144-pin TQFP (TQ144) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile, instant-on) |
| In-System Programming | IEEE Std. 1532 compliant (JTAG) | β |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (selected speed grades) | β |
| Logic Family | CMOS | β |
| Operating Temperature | 0 C to 70 C (commercial) | 0C to +70C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Family | β | MAX 3000A |
| Macro Cells | β | 128 |
| Logic Elements / LABs | β | 4 Logic Array Blocks |
| Counter Frequency (fCNT) | β | Up to 227.3 MHz |
| MultiVolt I/O Interface | β | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | β | IEEE Std. 1532 compliant |
| Boundary-Scan Test | β | IEEE Std. 1149.1 (JTAG) |
| Lead-Free | β | Yes |