EPM3128ATC100-10 vs EPM3128ATI100-5N Comparison
Detailed side-by-side comparison of EPM3128ATC100-10 by Altera and EPM3128ATI100-5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATC100-10 - MAX 3000A 128-Macrocell CPLD, 10ns TQFP-100 | Intel / Altera
EPM3128ATC100-10 NrndIntel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ ActiveSpecification Comparison
| Parameter | EPM3128ATC100-10 | EPM3128ATI100-5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Active |
| Device Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 128 |
| User I/Os | 80 | — |
| Usable Gates | 2500 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Counter Frequency | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Voltage Tolerance | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Package | 100-pin TQFP | 100-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | Non-volatile EEPROM |
| In-System Programming | IEEE Std. 1532 compliant (JTAG) | — |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (selected speed grades) | — |
| Logic Family | CMOS | — |
| Operating Temperature | 0 C to 70 C (commercial) | -40C to +85C (Industrial) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant (lead-free TQFP package) |
| Family | — | MAX 3000A |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells per LAB) |
| User I/O Pins | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 5.0 ns |
| I/O Standard | — | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs |
| Programming Method | — | In-System Programmable via IEEE Std. 1532 (JTAG) |
| JTAG Support | — | IEEE 1149.1 boundary scan |