EPM3128ATC100-10N vs EPM3512AQC20810 Comparison
Detailed side-by-side comparison of EPM3128ATC100-10N by Altera and EPM3512AQC20810 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATC100-10N - 128-Macrocell MAX 3000A CPLD, 10ns, TQFP-100 | Intel
EPM3128ATC100-10N Nrnd
Specification Comparison
| Parameter | EPM3128ATC100-10N | EPM3512AQC20810 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.20 | $16.80 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macro Cells | 128 | 512 |
| Usable Gates | 2500 | β |
| Number of I/O | 80 | β |
| Logic Elements / Blocks | 8 LABs (16 macrocells each) | β |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Maximum Internal Frequency (fMAX) | 98 MHz | β |
| Supply Voltage VCCINT | 3.3 V | β |
| I/O Bank Voltage VCCIO | 3.3 V or 2.5 V (selectable) | β |
| Configuration Memory | CMOS EEPROM (non-volatile, instant-on) | On-chip EEPROM, non-volatile, 100+ cycles, 10+ year retention |
| In-System Programming | IEEE Std. 1532-compliant ISP via JTAG | β |
| Package | 100-pin TQFP (14 x 14 x 1.0 mm) | 208-pin PQFP (PQ208) |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | β |
| Mounting Type | Surface Mount | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | β |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| Logic Type | β | CPLD (EEPROM-based, non-volatile) |
| User I/Os | β | 172 |
| Logic Array Blocks (LABs) | β | 16 |
| Usable Gates (equivalent) | β | 10000 |
| Speed Grade | β | -10 (tPD = 10 ns) |
| Maximum Internal Frequency | β | 132 MHz |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Supply Voltage (VCCIO) | β | 3.3 V |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG, 3.3 V ISP) |
| PCI Compliance | β | PCI Local Bus Specification Revision 2.2 compliant |
| Operating Temperature (commercial) | β | 0 Β°C to +70 Β°C |
| Process Technology | β | 0.30 Β΅m CMOS EEPROM |