EPM3128ATC100-10NS vs EPM3128ATC100-7 Comparison
Detailed side-by-side comparison of EPM3128ATC100-10NS by Intel and EPM3128ATC100-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3128ATC100-10NS | EPM3128ATC100-7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | 128 |
| User I/Os | 80 | 80 |
| Pin Count | 100 | — |
| Package | TQFP-100 | 100-pin TQFP, 14x14 mm, 0.5 mm pitch |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | 129.9 MHz |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V (5.0 V-tolerant inputs) | — |
| Logic-Level Compatibility | 5.0 V, 3.3 V, 2.5 V | — |
| Programmability | In-system (ISP), IEEE Std. 1532 | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Mounting Type | Surface Mount | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Typical Gates | — | 2500 |
| Logic Elements / LABs | — | 4 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V tolerant inputs |
| Programming Technology | — | EEPROM (non-volatile, in-system programmable) |
| ISP Standard | — | IEEE Std. 1532 (JTAG) |
| Speed Grade | — | -7 (fastest grade in family) |
| Process Technology | — | CMOS EEPROM |