EPM3128ATC100-7N vs EPM3128ATC100-10NS Comparison
Detailed side-by-side comparison of EPM3128ATC100-7N by Intel and EPM3128ATC100-10NS by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3128ATC100-7N - MAX 3000A 128-Macrocell CPLD, 7.5 ns, TQFP-100 | Intel (Altera)
EPM3128ATC100-7N Nrnd
Specification Comparison
| Parameter | EPM3128ATC100-7N | EPM3128ATC100-10NS |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.52 | $6.50 |
| Family | MAX 3000A | MAX 3000A |
| Macro Cells | 128 | 128 |
| Usable Gates | Up to 10,000 | β |
| Number of I/Os | 80 | β |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | β |
| Propagation Delay (tPD) | 7.5 ns | β |
| Counter Frequency (max) | 227.3 MHz | β |
| Supply Voltage - Core | 3.3 V | β |
| I/O Interface Levels | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) | β |
| In-System Programmability | Yes (IEEE 1532 / JTAG) | β |
| Program Memory Type | EEPROM (non-volatile) | β |
| Operating Temperature | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Package | TQFP-100 (100-pin TQFP, fine-line BGA-256 noted in third-party listings) | TQFP-100 |
| Mounting Type | Surface Mount | Surface Mount |
| Logic Family | CMOS | β |
| Speed Grade | -7 | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| User I/Os | β | 80 |
| Pin Count | β | 100 |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Counter Frequency (fCNT) | β | up to 227.3 MHz |
| Supply Voltage - Core (VCCINT) | β | 3.3 V |
| Supply Voltage - I/O (VCCIO) | β | 3.3 V or 2.5 V (5.0 V-tolerant inputs) |
| Logic-Level Compatibility | β | 5.0 V, 3.3 V, 2.5 V |
| Programmability | β | In-system (ISP), IEEE Std. 1532 |
| Boundary Scan | β | IEEE 1149.1 JTAG |
| Configuration Memory | β | EEPROM (non-volatile) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |