EPM3128ATC144-10 vs EPM3128ATC144-7N Comparison
Detailed side-by-side comparison of EPM3128ATC144-10 by Altera and EPM3128ATC144-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3128ATC144-7N - MAX 3000A CPLD, 128 Macrocells, 7.5ns | Altera
EPM3128ATC144-7N β ActiveSpecification Comparison
| Parameter | EPM3128ATC144-10 | EPM3128ATC144-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.20 | $9.25 |
| Family | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | β |
| User I/Os | 96 | 96 |
| Usable Gates | 2,500 (typical) | β |
| Logic Elements / LABs | 4 Logic Array Blocks | β |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | 7.5 ns (pin-to-pin, -7 speed grade) |
| Counter Frequency (fCNT) | Up to 227.3 MHz | β |
| Supply Voltage (VCCINT) | 3.3 V | β |
| MultiVolt I/O Interface | 1.5V / 1.8V / 2.5V / 3.3V | β |
| In-System Programmability | IEEE Std. 1532 compliant | β |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | β |
| Configuration Memory | EEPROM (non-volatile, instant-on) | β |
| Package | 144-pin TQFP (TQ144) | TQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount (SMD/SMT) |
| Operating Temperature | 0C to +70C (commercial) | 0 Β°C to +70 Β°C (commercial) |
| RoHS Status | Compliant | Lead-free (-7N suffix indicates Pb-free finish) |
| Lead-Free | Yes | β |
| Series | β | MAX 3000A |
| Architecture | β | EEPROM-based, MAX architecture |
| Number of Macrocells | β | 128 |
| Number of Usable Gates | β | Up to 10,000 |
| Pin Count | β | 144 |
| Logic Family | β | CMOS |
| Counter Frequency | β | Up to 227.3 MHz |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Supply Voltage (VCCIO) | β | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| In-System Programmability (ISP) | β | Yes, via JTAG (IEEE 1149.1) |
| PCI Compliance | β | Compatible with PCI Local Bus Specification Rev. 2.2 |