EPM3128ATC144-7N vs EPM3128ATC144-7 Comparison

Detailed side-by-side comparison of EPM3128ATC144-7N by Altera and EPM3128ATC144-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3128ATC144-7N EPM3128ATC144-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active NRND
Unit Price (USD) $9.25 —
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture EEPROM-based, MAX architecture —
Number of Macrocells 128 —
Number of Usable Gates Up to 10,000 —
User I/Os 96 96
Pin Count 144 —
Package TQFP-144 (20 x 20 mm, 0.5 mm pitch) TQFP-144 (22x22 mm)
Logic Family CMOS —
Propagation Delay (tPD) 7.5 ns (pin-to-pin, -7 speed grade) —
Counter Frequency Up to 227.3 MHz —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Operating Temperature 0 °C to +70 °C (commercial) 0C to +70C (Commercial)
In-System Programmability (ISP) Yes, via JTAG (IEEE 1149.1) —
PCI Compliance Compatible with PCI Local Bus Specification Rev. 2.2 —
Mounting Type Surface Mount (SMD/SMT) Surface Mount
RoHS Status Lead-free (-7N suffix indicates Pb-free finish) —
Family — MAX 3000A
Macrocells — 128
Usable Gates — 2,500
Logic Array Blocks (LABs) — 8 (16 macrocells each)
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V (multiVolt)
Speed Grade — -7
Pin-to-Pin Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fCNT) — 129.9 MHz
Programming Technology — CMOS EEPROM (in-system programmable)
JTAG Support — IEEE 1149.1 boundary-scan + ISP
Process Technology — CMOS EEPROM

Datasheets & Resources

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