EPM3128ATC144-7N vs EPM3128ATC144-7 对比

详细并排对比 EPM3128ATC144-7N 出自 Altera 和 EPM3128ATC144-7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATC144-7N EPM3128ATC144-7
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.25 $8.10
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture EEPROM-based, MAX architecture —
Number of Macrocells 128 —
Number of Usable Gates Up to 10,000 —
User I/Os 96 96
引脚数量 144 —
封装 TQFP-144 (20 x 20 mm, 0.5 mm pitch) TQFP-144 (22x22 mm)
Logic Family CMOS —
Propagation Delay (tPD) 7.5 ns (pin-to-pin, -7 speed grade) —
Counter Frequency Up to 227.3 MHz —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
工作温度 0 °C to +70 °C (commercial) 0C to +70C (Commercial)
In-System Programmability (ISP) Yes, via JTAG (IEEE 1149.1) —
PCI Compliance Compatible with PCI Local Bus Specification Rev. 2.2 —
安装类型 Surface Mount (SMD/SMT) Surface Mount
RoHS 状态 Lead-free (-7N suffix indicates Pb-free finish) —
Family — MAX 3000A
Macrocells — 128
Usable Gates — 2,500
Logic Array Blocks (LABs) — 8 (16 macrocells each)
Supply Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V (multiVolt)
Speed Grade — -7
Pin-to-Pin Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fCNT) — 129.9 MHz
Programming Technology — CMOS EEPROM (in-system programmable)
JTAG Support — IEEE 1149.1 boundary-scan + ISP
Process Technology — CMOS EEPROM

数据手册与资源

浏览全部产品 创建 BOM 获取报价