EPM3128ATI100-5N vs EPM3128ATC100-5N Comparison
Detailed side-by-side comparison of EPM3128ATI100-5N by Intel and EPM3128ATC100-5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3128ATI100-5N - MAX 3000A CPLD, 128 Macrocells, TQFP-100 | Intel / Altera
EPM3128ATI100-5N ✓ ActiveSpecification Comparison
| Parameter | EPM3128ATI100-5N | EPM3128ATC100-5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 (16 macrocells per LAB) | 8 (16 macrocells each) |
| User I/O Pins | 80 | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Standard | 3.3 V LVCMOS / LVTTL, 5.0 V tolerant inputs | — |
| Programming Method | In-System Programmable via IEEE Std. 1532 (JTAG) | — |
| Operating Temperature | -40C to +85C (Industrial) | 0 C to +70 C (commercial) |
| Package | 100-pin TQFP | TQFP-100 (TC100) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | Non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| RoHS Status | Compliant (lead-free TQFP package) | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 3000A |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | Up to 10,000 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 5 ns |
| Maximum Internal Frequency | — | 192.3 MHz |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| Programming Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (IEEE Std. 1532) |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |