EPM3256AFC256-7 vs EPM3128AFC256-7N Comparison

Detailed side-by-side comparison of EPM3256AFC256-7 by Altera and EPM3128AFC256-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3256AFC256-7 EPM3128AFC256-7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $12.10 $19.85
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macro Cells 256 128
Logic Array Blocks (LABs) 16 β€”
Usable Gates 10,000 2,500
User I/Os 161 98
Pin-to-Pin Logic Delay 4.5 ns (max) β€”
Counter Frequency 227.3 MHz (max) β€”
Propagation Delay (tpd) 10 ns β€”
Core Voltage 3.3 V β€”
I/O Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) β€”
Process Technology CMOS EEPROM, 0.30 Β΅m β€”
In-System Programmability IEEE Std. 1532-compliant 3.3-V ISP β€”
Boundary-Scan Test JTAG (IEEE 1149.1) β€”
Package FBGA-256 (FineLine BGA), 256 balls 256-BGA (FineLine, FBGA)
Operating Temperature 0 Β°C to 70 Β°C (Commercial) 0 C to +70 C (commercial)
Speed Grade -7 β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] β€”
Architecture β€” CMOS EEPROM-based MAX
Propagation Delay (tPD) β€” 7.5 ns
Internal fMAX β€” 192.3 MHz
Supply Voltage - Core (VCCINT) β€” 3.3 V
Supply Voltage - I/O (VCCIO) β€” 3.3 V or 2.5 V
Logic Family β€” CMOS
Programmability β€” In-system (ISP), IEEE Std. 1532, JTAG (IEEE Std. 1149.1)
Mounting Type β€” Surface Mount

Datasheets & Resources

Browse All Products Create BOM Request Quote