EPM3512AFC256-5C vs EPM3512AFC256-7N Comparison

Detailed side-by-side comparison of EPM3512AFC256-5C by Altera and EPM3512AFC256-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AFC256-5C EPM3512AFC256-7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $28.95 $61.00
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 512 512
Usable Gates 10,000 10,000
Maximum Operating Frequency 95.2 MHz β€”
Pin-to-Pin Delay (tPD) 5 ns β€”
Supply Voltage - Core (VCCINT) 3.3 V β€”
I/O Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (banked MultiVolt I/O) β€”
User I/O Pins 212 (max) β€”
Package 256-ball FBGA, 17 mm Γ— 17 mm, 1.0 mm pitch 256-pin FineLine BGA (FBGA-256), 1.0 mm pitch
Operating Temperature 0 Β°C to +70 Β°C (commercial, "C" grade) 0 C to 70 C (commercial)
Programming Interface IEEE Std. 1532 / JTAG (4-wire) in-system programmable JTAG (IEEE 1149.1)
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Technology EEPROM-based macrocell, non-volatile β€”
Product Type β€” CPLD (Complex Programmable Logic Device)
User I/Os β€” 208
Logic Blocks β€” 16 (32 macrocells each)
Propagation Delay (tPD) β€” 7.5 ns
Maximum Internal Frequency (fMAX) β€” 116.3 MHz
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 3.3 V or 2.5 V
5V Tolerant I/O β€” Yes
In-System Programmability β€” IEEE Std. 1532 compliant
Process Technology β€” CMOS EEPROM, 0.30 um

Datasheets & Resources

Browse All Products Create BOM Request Quote