EPM3512AFC256-7 vs EPM3256AFC256-7 Comparison
Detailed side-by-side comparison of EPM3512AFC256-7 by Intel and EPM3256AFC256-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3512AFC256-7 - 512-Macrocell MAX 3000A CPLD, 7.5ns, BGA-256 | Intel
EPM3512AFC256-7 β Last Time BuySpecification Comparison
| Parameter | EPM3512AFC256-7 | EPM3256AFC256-7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $58.40 | $12.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | β |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins | 212 | β |
| Usable Gates | 10,000 | 10,000 |
| Pin-to-Pin Logic Delay | 7.5 ns | 4.5 ns (max) |
| Counter Frequency (max) | 227.3 MHz | β |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V typ.) | β |
| I/O Voltage (VCCIO) | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | β |
| Package | 256-ball FineLine BGA (FBGA-256) | FBGA-256 (FineLine BGA), 256 balls |
| Programming | EEPROM, IEEE 1149.1 JTAG ISP (IEEE 1532-compliant) | β |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | 0 Β°C to 70 Β°C (Commercial) |
| Mounting Type | Surface Mount | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Configuration Memory | Non-volatile EEPROM | β |
| Macro Cells | β | 256 |
| User I/Os | β | 161 |
| Counter Frequency | β | 227.3 MHz (max) |
| Propagation Delay (tpd) | β | 10 ns |
| Core Voltage | β | 3.3 V |
| I/O Compatibility | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) |
| Process Technology | β | CMOS EEPROM, 0.30 Β΅m |
| In-System Programmability | β | IEEE Std. 1532-compliant 3.3-V ISP |
| Boundary-Scan Test | β | JTAG (IEEE 1149.1) |
| Speed Grade | β | -7 |