EPM3512AFI256-10N vs EPM3512ATI256-10N Comparison

Detailed side-by-side comparison of EPM3512AFI256-10N by Altera and EPM3512ATI256-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AFI256-10N EPM3512AFI256-10N - 512-Macro MAX 3000A CPLD, 256-FBGA | Intel/Altera

EPM3512AFI256-10N - 512-Macro MAX 3000A CPLD, 256-FBGA | Intel/Altera

EPM3512AFI256-10N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AFI256-10N EPM3512ATI256-10N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $21.75 $19.85
Family MAX 3000A MAX 3000A
Series EPM3512 β€”
Device Type CPLD (Complex Programmable Logic Device) β€”
Architecture CMOS EEPROM-based, MAX architecture β€”
Number of Macrocells 512 β€”
Number of Logic Array Blocks (LABs) 16 β€”
Usable Gates Up to 10,000 10,000
Number of User I/O 208 β€”
Total Pins 256 β€”
Pin-to-Pin Propagation Delay (tPD) 10 ns β€”
Maximum Counter Frequency 227.3 MHz β€”
Core Supply Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) β€”
I/O Supply Voltage (VCCIO) 2.5 V or 3.3 V (5.0 V tolerant inputs) β€”
MultiVolt I/O Support 5.0 V / 3.3 V / 2.5 V β€”
In-System Programmability Yes - IEEE Std 1532 compliant β€”
JTAG Boundary Scan Yes - IEEE 1149.1 β€”
Program Memory EEPROM (non-volatile) β€”
Package 256-ball FineLine BGA (FBGA-256) 256-pin BGA (TI256)
Mounting Type Surface Mount Surface Mount
Operating Temperature Range -40 Β°C to +85 Β°C (industrial) β€”
RoHS Status Compliant [DATA_NEEDED: RoHS status]
Speed Grade -10 (10 ns tPD) -10 (10 ns pin-to-pin delay)
Manufacturer β€” Intel (formerly Altera Corporation)
Device β€” EPM3512A
Macrocells β€” 512
Logic Array Blocks (LABs) β€” 16
Maximum User I/O β€” 212
Operating Temperature β€” -40C to +85C (Industrial)
Core Voltage β€” 3.3 V
I/O Voltage Support β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Programming Technology β€” EEPROM (non-volatile, in-system programmable)
JTAG Support β€” IEEE Std 1149.1 boundary-scan, 4-pin JTAG
Programmable Security Bit β€” Yes (design protection)
Lifecycle Status β€” Obsolete / Last Time Buy (per Altera product discontinuation notices)

Datasheets & Resources

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