EPM3512AFI256-7N vs EPM3512AFC256-7 Comparison

Detailed side-by-side comparison of EPM3512AFI256-7N by Altera and EPM3512AFC256-7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AFI256-7N EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera

EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera

EPM3512AFI256-7N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AFI256-7N EPM3512AFC256-7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Last Time Buy
Family MAX 3000A MAX 3000A
Device Logic Elements / Macrocells 512 macrocells —
Typical Usable Gates 10,000 gates —
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins [DATA_NEEDED: user I/O count] —
Maximum Operating Frequency (fMAX) 116.3 MHz —
Pin-to-Pin Delay (tPD, speed grade -7) approximately 7.5 ns —
Supply Voltage (VCCINT) 3.3 V —
MultiVolt I/O Levels 2.5 V / 3.3 V / 5 V mixed —
Configuration Memory Non-volatile EEPROM Non-volatile EEPROM
Programming Interface IEEE 1149.1 JTAG (in-system programmable) —
Package 256-ball FBGA 256-ball FineLine BGA (FBGA-256)
Operating Temperature Range -40C to +85C (industrial) —
Lead-Free / RoHS Yes ('N' suffix, lead-free) —
Design Software Quartus II (legacy MAX 3000A support) —
Speed Grade -7 —
Mounting Type Surface Mount (BGA) Surface Mount
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 512
User I/O Pins — 212
Usable Gates — 10,000
Pin-to-Pin Logic Delay — 7.5 ns
Counter Frequency (max) — 227.3 MHz
Supply Voltage - Core (VCCINT) — 3.0 V to 3.6 V (3.3 V typ.)
I/O Voltage (VCCIO) — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming — EEPROM, IEEE 1149.1 JTAG ISP (IEEE 1532-compliant)
Operating Temperature — [DATA_NEEDED: operating temperature grade]
RoHS Status — [DATA_NEEDED: RoHS status]

Datasheets & Resources

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