EPM3512AQC208-10-10N vs EPM3256AQI208-10N Comparison

Detailed side-by-side comparison of EPM3512AQC208-10-10N by Altera and EPM3256AQI208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3512AQC208-10-10N EPM3256AQI208-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $31.20 $9.75
Family MAX 3000A MAX 3000A
Macrocells 512 256
Usable Gates 10,000 5,000
User I/Os 172 161
Logic Elements / LABs 16 Logic Array Blocks 16 Logic Array Blocks (LABs)
Propagation Delay (tPD) 10 ns (-10 speed grade) 10 ns
Maximum Frequency (fCNT) 87 MHz β€”
Supply Voltage - Core (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V β€”
Process Technology CMOS EEPROM CMOS EEPROM
In-System Programmability Yes, IEEE Std. 1532 compliant β€”
Boundary-Scan (JTAG) Yes, IEEE 1149.1 β€”
PCI-SIG Compliance PCI Local Bus Specification Rev 2.2 (at -10 speed grade) β€”
Operating Temperature 0 Β°C to +70 Β°C (commercial) -40 C to +85 C (industrial)
Package 208-pin PQFP (Plastic Quad Flat Pack) 208-pin PQFP (Plastic Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Lead-Free / RoHS [DATA_NEEDED: RoHS status] β€”
Counter Frequency β€” 118.7 MHz (max, -10 speed grade)
Speed Grade β€” -10
Supply Voltage - Core β€” 3.3 V
I/O Logic Level Compatibility β€” 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O)
Programming Interface β€” JTAG (IEEE 1149.1) ISP
Hot-Socketing Support β€” Yes
RoHS Status β€” Non-compliant (Pb-bearing PQFP package)

Datasheets & Resources

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