EPM3512AQC20810N vs EPM3512AQC208-15N Comparison

Detailed side-by-side comparison of EPM3512AQC20810N by Altera and EPM3512AQC208-15N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3512AQC208-15N EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera

EPM3512AQC208-15N ⚠ Last Time Buy

Specification Comparison

Parameter EPM3512AQC20810N EPM3512AQC208-15N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $39.75 $20.50
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD - Complex Programmable Logic Device
Macro Cells 512 512
Usable Gates 10,000 β€”
User I/Os 172 β€”
Logic Array Blocks (LABs) 16 16
Propagation Delay (tPD) 10 ns β€”
Core Voltage (VCCINT) 3.3 V β€”
I/O Voltage (VCCIO) 3.3 V (5.0 V tolerant I/O) β€”
Package 208-pin PQFP (Plastic Quad Flat Pack) PQFP-208 (QC208)
Configuration Memory EEPROM (non-volatile, instant-on) EEPROM (non-volatile)
Programming Interface JTAG (IEEE 1149.1 / IEEE 1532 ISP) β€”
Maximum Frequency [DATA_NEEDED: fMAX] β€”
Operating Temperature [DATA_NEEDED: industrial/commercial grade range] 0C to +70C (commercial)
RoHS Status [DATA_NEEDED: lead-free/RoHS status] [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount Surface Mount
MSL Level [DATA_NEEDED: MSL rating] β€”
Maximum User I/O Pins β€” 172
Typical Usable Gates β€” 12,000
Number of Logic Elements β€” 512
Pin-to-Pin Delay (tPD) β€” 15 ns
Operating Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 2.5 V / 3.3 V (MultiVolt)
Programmable I/O Standards β€” LVTTL, LVCMOS, PCI (with external resistor)
In-System Programmability β€” Yes (IEEE Std. 1532 compliant)
JTAG Support β€” Yes (BST/Boundary-Scan Test)

Datasheets & Resources

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