EPM3512AQC20810N vs EPM3512AQC208-15N Comparación
Comparación detallada lado a lado de EPM3512AQC20810N por Altera y EPM3512AQC208-15N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N ⚠ Última compraComparación de especificaciones
| Parámetro | EPM3512AQC20810N | EPM3512AQC208-15N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $39,75 | $20,50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 512 | 512 |
| Usable Gates | 10,000 | — |
| User I/Os | 172 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Propagation Delay (tPD) | 10 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V (5.0 V tolerant I/O) | — |
| Encapsulado | 208-pin PQFP (Plastic Quad Flat Pack) | PQFP-208 (QC208) |
| Configuration Memory | EEPROM (non-volatile, instant-on) | EEPROM (non-volatile) |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532 ISP) | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial/commercial grade range] | 0C to +70C (commercial) |
| Estado RoHS | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: RoHS status] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Maximum User I/O Pins | — | 172 |
| Typical Usable Gates | — | 12,000 |
| Number of Logic Elements | — | 512 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Operating Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V (MultiVolt) |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI (with external resistor) |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| JTAG Support | — | Yes (BST/Boundary-Scan Test) |