EPM3512AQC20810N vs EPM3512AQC208-15N 비교
다음의 상세 나란히 비교: EPM3512AQC20810N 제조: Altera 및 EPM3512AQC208-15N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM3512AQC20810N | EPM3512AQC208-15N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | 최종 구매 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $39.75 | $20.50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 512 | 512 |
| Usable Gates | 10,000 | — |
| User I/Os | 172 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Propagation Delay (tPD) | 10 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V (5.0 V tolerant I/O) | — |
| 패키지 | 208-pin PQFP (Plastic Quad Flat Pack) | PQFP-208 (QC208) |
| Configuration Memory | EEPROM (non-volatile, instant-on) | EEPROM (non-volatile) |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532 ISP) | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| 동작 온도 | [DATA_NEEDED: industrial/commercial grade range] | 0C to +70C (commercial) |
| RoHS 상태 | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: RoHS status] |
| 실장 유형 | Surface Mount | Surface Mount |
| MSL 레벨 | [DATA_NEEDED: MSL rating] | — |
| Maximum User I/O Pins | — | 172 |
| Typical Usable Gates | — | 12,000 |
| Number of Logic Elements | — | 512 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Operating Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V (MultiVolt) |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI (with external resistor) |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| JTAG Support | — | Yes (BST/Boundary-Scan Test) |