EPM5016LC-17 vs EPM5032LC-20 Comparison
Detailed side-by-side comparison of EPM5016LC-17 by Altera and EPM5032LC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5016LC-17 | EPM5032LC-20 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 5000 EPLD | — |
| Technology | CMOS, UV-erasable | — |
| Macrocells | 16 | 32 |
| Product Terms | 160 | — |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 8 | — |
| Total Input Pins | 16 | — |
| Outputs | 8 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 17 ns | 20 ns |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| Package | Windowed Ceramic DIP (LC) | LCC-28 (Plastic Leaded Chip Carrier, J-lead) |
| Supply Voltage | [DATA_NEEDED: VCC range] | — |
| Operating Temperature | [DATA_NEEDED: temperature grade] | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Compatibility | TTL/CMOS | — |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD / CPLD (One-Time Programmable / UV-Erasable) |
| Usable Gates | — | 600 gates |
| Logic Blocks (LABs) | — | 1 |
| Speed Grade | — | -20 (20 ns pin-to-pin) |
| Maximum Frequency | — | 71.4 MHz |
| Supply Voltage (VCC) | — | 5 V ±5% |
| Bidirectional I/O Pins | — | 16 |
| Total Inputs | — | 24 |
| Output Functions | — | 16 |
| Product Terms per Output | — | 16 |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Mounting Type | — | Surface Mount |
| MSL Level | — | [DATA_NEEDED: MSL] |