EPM5016LC-17 vs EPM5032LC-20 Comparaison
Comparaison détaillée côte à côte de EPM5016LC-17 par Altera et EPM5032LC-20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5016LC-17 | EPM5032LC-20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $10,95 | $8,40 |
| Family | MAX 5000 EPLD | — |
| Technology | CMOS, UV-erasable | — |
| Macrocells | 16 | 32 |
| Product Terms | 160 | — |
| Dedicated Inputs | 7 | 7 |
| I/O Pins | 8 | — |
| Total Input Pins | 16 | — |
| Outputs | 8 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 17 ns | 20 ns |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| Boîtier | Windowed Ceramic DIP (LC) | LCC-28 (Plastic Leaded Chip Carrier, J-lead) |
| Tension d'alimentation | [DATA_NEEDED: VCC range] | — |
| Température de fonctionnement | [DATA_NEEDED: temperature grade] | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Compatibility | TTL/CMOS | — |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD / CPLD (One-Time Programmable / UV-Erasable) |
| Usable Gates | — | 600 gates |
| Logic Blocks (LABs) | — | 1 |
| Speed Grade | — | -20 (20 ns pin-to-pin) |
| Maximum Frequency | — | 71.4 MHz |
| Supply Voltage (VCC) | — | 5 V ±5% |
| Bidirectional I/O Pins | — | 16 |
| Total Inputs | — | 24 |
| Output Functions | — | 16 |
| Product Terms per Output | — | 16 |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Type de montage | — | Surface Mount |
| Niveau MSL | — | [DATA_NEEDED: MSL] |