EPM5032LC-15 vs EPM5016LC-17 Comparison
Detailed side-by-side comparison of EPM5032LC-15 by Altera and EPM5016LC-17 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5032LC-15 | EPM5016LC-17 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.20 | $10.95 |
| Family | MAX 5000 EPLD | MAX 5000 EPLD |
| Architecture | PAL-type AND/OR with PIA | PAL-type with Programmable Interconnect Array (PIA) |
| Usable Gates | 600 | β |
| Macrocells | 32 | 16 |
| Logic Array Blocks (LABs) | 4 | β |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | β |
| Maximum Operating Frequency | 83.3 MHz | β |
| Pin-to-Pin Delay (tPD) | 15 ns | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | β |
| Technology | CMOS EPROM, 1.0 um process | CMOS, UV-erasable |
| Programmability | UV-Erasable / OTP | β |
| Package | JLCC-28 (windowed ceramic) | Windowed Ceramic DIP (LC) |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| RoHS Status | Non-compliant (contains Pb, ceramic-windowed package) | [DATA_NEEDED: RoHS compliance] |
| Product Terms | β | 160 |
| I/O Pins | β | 8 |
| Total Input Pins | β | 16 |
| Outputs | β | 8 |
| External Clock Inputs | β | 1 |
| Propagation Delay (tPD) | β | 17 ns |
| Supply Voltage | β | [DATA_NEEDED: VCC range] |
| Logic Compatibility | β | TTL/CMOS |