EPM5032LC-15 vs EPM5016LC-17 Comparación
Comparación detallada lado a lado de EPM5032LC-15 por Altera y EPM5016LC-17 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5032LC-15 | EPM5016LC-17 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,20 | $10,95 |
| Family | MAX 5000 EPLD | MAX 5000 EPLD |
| Architecture | PAL-type AND/OR with PIA | PAL-type with Programmable Interconnect Array (PIA) |
| Usable Gates | 600 | — |
| Macrocells | 32 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | — |
| Maximum Operating Frequency | 83.3 MHz | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM, 1.0 um process | CMOS, UV-erasable |
| Programmability | UV-Erasable / OTP | — |
| Encapsulado | JLCC-28 (windowed ceramic) | Windowed Ceramic DIP (LC) |
| Temperatura de funcionamiento | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| Estado RoHS | Non-compliant (contains Pb, ceramic-windowed package) | [DATA_NEEDED: RoHS compliance] |
| Product Terms | — | 160 |
| I/O Pins | — | 8 |
| Total Input Pins | — | 16 |
| Outputs | — | 8 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 17 ns |
| Tensión de alimentación | — | [DATA_NEEDED: VCC range] |
| Logic Compatibility | — | TTL/CMOS |