EPM5064LC-1 vs EPM5064LI Comparison
Detailed side-by-side comparison of EPM5064LC-1 by Altera and EPM5064LI by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5064LC-1 | EPM5064LI |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1.25K (approx.) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.5 V to 5.5 V |
| Internal Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 40 ns | 55 ns (typical) |
| Input Lines | 36 | — |
| Dedicated Inputs | 7 | 7 |
| Output Lines | 28 | — |
| Programming Technology | OTP / UV-Erasable EPROM | — |
| Package | 44-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Process Technology | CMOS | 1-micron EPIC CMOS |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm RoHS status - legacy Altera part] |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Terminals | — | 44 |
| Package Code | — | QCCJ (PLCC-44, J-bend) |
| Package Shape | — | Square |
| Configuration Memory | — | UV-Erasable / OTP (EPROM-based) |
| Operating Temperature Grade | — | Industrial |
| Maximum Clock Frequency | — | 33.3 MHz |
| I/O Pins | — | 28 bidirectional |
| Total User Inputs | — | 36 |
| Latch-up Immunity | — | 500 mA typical at 125 C |
| Mounting Type | — | Surface Mount |