EPM5064LC-1 vs EPM5064LI Comparaison
Comparaison détaillée côte à côte de EPM5064LC-1 par Altera et EPM5064LI par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5064LC-1 | EPM5064LI |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $9,95 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1.25K (approx.) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.5 V to 5.5 V |
| Internal Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 40 ns | 55 ns (typical) |
| Input Lines | 36 | — |
| Dedicated Inputs | 7 | 7 |
| Output Lines | 28 | — |
| Programming Technology | OTP / UV-Erasable EPROM | — |
| Boîtier | 44-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Process Technology | CMOS | 1-micron EPIC CMOS |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm RoHS status - legacy Altera part] |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Terminals | — | 44 |
| Package Code | — | QCCJ (PLCC-44, J-bend) |
| Package Shape | — | Square |
| Configuration Memory | — | UV-Erasable / OTP (EPROM-based) |
| Operating Temperature Grade | — | Industrial |
| Fréquence d'horloge maximale | — | 33.3 MHz |
| I/O Pins | — | 28 bidirectional |
| Total User Inputs | — | 36 |
| Latch-up Immunity | — | 500 mA typical at 125 C |
| Type de montage | — | Surface Mount |