EPM5064LC-1 vs EPM5064LI Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5064LC-1 sa pamamagitan ng Altera at EPM5064LI sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5064LC-1 | EPM5064LI |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1.25K (approx.) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.5 V to 5.5 V |
| Internal Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 40 ns | 55 ns (typical) |
| Input Lines | 36 | — |
| Dedicated Inputs | 7 | 7 |
| Output Lines | 28 | — |
| Programming Technology | OTP / UV-Erasable EPROM | — |
| Packhaging | 44-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Process Technology | CMOS | 1-micron EPIC CMOS |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirm RoHS status - legacy Altera part] |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Terminals | — | 44 |
| Package Code | — | QCCJ (PLCC-44, J-bend) |
| Package Shape | — | Square |
| Configuration Memory | — | UV-Erasable / OTP (EPROM-based) |
| Operating Temperature Grade | — | Industrial |
| Maksimum na Taktiko ng Oras | — | 33.3 MHz |
| I/O Pins | — | 28 bidirectional |
| Total User Inputs | — | 36 |
| Latch-up Immunity | — | 500 mA typical at 125 C |
| Uri ng Pagpapasok | — | Surface Mount |