EPM5064LC-2 vs EPM5064JC-2 Comparison
Detailed side-by-side comparison of EPM5064LC-2 by Altera and EPM5064JC-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5064LC-2 | EPM5064JC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $8.40 | $23.10 |
| Device Family | MAX 5000 | β |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Logic Elements per LAB | 16 | β |
| Number of Inputs | 36 (7 dedicated + 28 I/O) | β |
| Number of I/O Pins | 28 | β |
| Number of Flip-Flops | 28 | β |
| Propagation Delay (tPD) | 45 ns | 45 ns |
| Maximum Internal Frequency | 40 MHz | β |
| Process Technology | CMOS, OTP EPROM (UV-erasable base) | β |
| Programmable Polarity | Yes | β |
| Programmable Output Enable | Yes, per macrocell | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (4.75 V to 5.25 V) |
| Operating Temperature | -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source] | [DATA_NEEDED: commercial or industrial grade] |
| Package | PLCC-44 (J-Lead, plastic) | 28-pin CLCC (J-lead, ceramic, windowed) |
| Mounting Type | Surface Mount | β |
| RoHS Status | [DATA_NEEDED: not specified in source] | β |
| Programming Method | Altera byte-wide / JTAG programmer | UV-erase + EPROM programmer (not ISP) |
| Family | β | MAX 5000 |
| Maximum Clock Frequency (fMAX) | β | 50 MHz |
| Usable Gates | β | 1250 |
| Dedicated Inputs | β | 7 |
| I/O Pins | β | 28 |
| Interconnect | β | Programmable Interconnect Array (PIA) |
| Technology | β | CMOS, UV-erasable EPROM |
| Compliance | β | RoHS status unknown (ceramic/J-lead windowed part, legacy product) |