EPM5192AJM84-15 vs EPM5192AGC84-15 Comparison
Detailed side-by-side comparison of EPM5192AJM84-15 by Altera and EPM5192AGC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AJM84-15 | EPM5192AGC84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | UV-Erasable/OTP Complex PLD |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| User I/O Pins | 84 | 64 |
| Speed Grade | -15 (15 ns tPD) | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Operating Frequency | 83.3 MHz | — |
| Process Technology | 5 V CMOS, UV-EPROM | CMOS |
| Package | 84-pin ceramic J-lead (JM84) | 84-pin Ceramic PGA (Pin Grid Array) |
| Mounting Type | Surface Mount (ceramic J-lead) | Through-Hole |
| Operating Temperature Range | -55C to +125C (military grade) | — |
| Supply Voltage | [DATA_NEEDED: VCC range] | — |
| Erase Method | Ultraviolet (windowed ceramic package) | — |
| Programming Method | EPROM-style (programmer + UV erase) | — |
| I/O Standard | TTL-compatible CMOS | — |
| Development Tool | Altera MAX+PLUS II | — |
| RoHS Status | Non-compliant (ceramic with UV window) | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] |
| Lifecycle Status | Obsolete (EOL by Altera, now supported by Microchip / 3rd-party distributors) | — |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| Maximum Internal Clock Frequency | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Programmable Element | — | UV-Erasable EPROM cell |
| Operating Temperature | — | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] |