EPM5192AJM84-15 vs EPM5192AGC84-15 比較
詳細な並列比較: EPM5192AJM84-15 メーカー: Altera および EPM5192AGC84-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AJM84-15 | EPM5192AGC84-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.00 | $42.00 |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | UV-Erasable/OTP Complex PLD |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| User I/O Pins | 84 | 64 |
| Speed Grade | -15 (15 ns tPD) | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Operating Frequency | 83.3 MHz | — |
| Process Technology | 5 V CMOS, UV-EPROM | CMOS |
| パッケージ | 84-pin ceramic J-lead (JM84) | 84-pin Ceramic PGA (Pin Grid Array) |
| 実装タイプ | Surface Mount (ceramic J-lead) | Through-Hole |
| 動作温度範囲 | -55C to +125C (military grade) | — |
| 電源電圧 | [DATA_NEEDED: VCC range] | — |
| Erase Method | Ultraviolet (windowed ceramic package) | — |
| Programming Method | EPROM-style (programmer + UV erase) | — |
| I/O Standard | TTL-compatible CMOS | — |
| Development Tool | Altera MAX+PLUS II | — |
| RoHS ステータス | Non-compliant (ceramic with UV window) | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] |
| ライフサイクル状態 | Obsolete (EOL by Altera, now supported by Microchip / 3rd-party distributors) | — |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| Maximum Internal Clock Frequency | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Programmable Element | — | UV-Erasable EPROM cell |
| 動作温度 | — | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] |